This invention relates generally to voltage protection circuitry for integrated circuits and more particularly to a novel punchthru device configuration for redirecting damaging high voltages from integrated circuits.
Integrated circuits (ICs) are damaged when a high voltage electrostatic discharge (ESD) enters the circuit through external pins. For example, a person can build up and carry an electrostatic charge of 10,000 volts. If the person then handles the IC, the built-up electrostatic energy can be discharged into the IC through one of its external pins. The sudden transfer of high-voltage energy either damages the active and passive devices within the IC or the fine conductors or insulators that interconnect these devices. In either case, the IC is damaged and must be replaced.
Similar IC damage can occur from voltage spikes and current surges that come from signal lines coupled to the external IC I/O pins. For example, the IC power and ground pins are coupled through internal conductors to the active and passive devices of the IC. The external power and ground pins are then attached to power supplies and ground terminals, respectively.
To prevent damage from ESD, either a punchthru device or a diode is placed between the power supply bond pads and ground. For example, a typical punchthru device comprises a gateless field effect transistor that conducts current whenever its drain-to-source voltage rises above a predetermined voltage level. The drain of the punchthru device is coupled to an internal bond pad within the IC. The source of the punchthru device is coupled to ground. Thus, excessive voltage placed on an external IC pin causes the punchthru to conduct, shorting the pin to ground. This directs the high voltage or current from the sensitive internal components of the IC to ground.
To utilize this type of ESD protection, a ground ring is placed around the periphery of the IC die. The bond pads are placed inside the ground ring and connected to one of the internal power, ground, or data signal conductors. Punchthru devices are then coupled between each bond pad and the external ground ring.
The problem with this approach is that the punchthru device is at the periphery of the bond pad block. The bond pad block (i.e.,cell) comprises a bonding pad attached to a conductor. The bond pad cell is then defined by the bond pad and conductor circuitry described above and a predefined area surrounding this circuitry. The bonding pad receives a bonding wire that is coupled through the bond pad cell conductor to an internal conductor within the IC. To avoid latchup and signal interference from cross-talk, design rules require that bond-pad cells be spaced a minimum distance apart. These rules also require that guard rings be placed around each cell. However, the orientation and location of the punchthru device determines how close adjacent bond pad cell can be placed next to each other. For example, a punchthru device located on the outer perimeter of the area defining the cell, increases the distance that adjacent bond pad cells must be separated from each other.
In addition, only limited ESD protection is provided when a single punchthru is coupled between the external IC pins and ground. For example, various power and ground conductors exist within the IC. These conductors are not always coupled by an overvoltage protection device to ground. Thus, overvoltage conditions on these conductors will damage the IC. If only a single punchthru device is used, and the ground pin is inadvertently disconnected, the IC is left unprotected against over-voltage conditions. Alternatively, when excessive current passes to the bond pad, a single punchthru device may not be capable of carrying the entire charge.
Therefore, more effective over-voltage protection would be possible if redundant punchthru devices were placed between a bond pad and multiple power and ground conductors within the IC. This approach, however, requires additional punchthru devices. More punchthru devices not only increase the minimum distance requirements between cells, but also increase the amount of space required for each cell. Larger cells, and greater distances between cells, increase the size of the IC die and reduce the number of pins that can be placed around the outside of the IC. In addition, multiple punchthru devices would require different masks for each bond pad cell. This would increase the time and cost of designing the IC.
Accordingly, a need remains for a generic bond pad cell that can use multiple punchthru devices to provide redundant overvoltage protection.